Intel Mobile processors

Single-Core Mobile processorsCore 2 Solo"Penryn-3M" (ultra-low-voltage, 45 nm, Small Form Factor)All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Intel 64 (Intel's x86-64 implementation), XD bit (an NX bit implementation), iAMT2 (Intel Active Management), Virtualization Technology, Trusted Execution Technology, IDA (Intel Dynamic Acceleration)Socket P processors are capable of throttling the FSB anywhere between 400-800 MHz as necessary.Die size: TBAPackage size: 22 mm × 22 mmSteppings: C0,(B1, Engineering Samples) The above diagram is a variation on the traditional way of representing a processor's arithmetic logic unit (ALU), which is the part of the processor that does the actual addition, subtraction, etc. of numbers. However, instead of showing two operands entering the top ports and a result exiting the bottom (as is the custom in the literature) I've depicted a code stream and a data stream entering and a results stream leaving. For the purposes of our initial discussion, we can generalize by saying that the code stream is made up of different types of operations and the data stream consists of the data on which those operations operate. To illustrate this point and to put a more concrete face on the diagram above, imagine that one of those little black boxes is an addition operator (a "+" sign) and two of the white boxes contain the two integers to be added.